Advances in semiconductor technology have driven the performance limits of silicon beyond the capabilities of present packages. In particular, the power and current carrying capability of MOSFETS and IGBT's are often limited by insufficient package performance. The thermal and electrical resistance of the package results in power losses and corresponding heating of silicon beyond the limits thereof. In addition, the inductance of the package also results in certain limits for use with high switching currents. In particular, parasitic package inductance may result in inductive over-voltage that can destroy the silicon device (Si-device). This is a particular problem in conventional packaging that utilizes bond wires for the electrical connection of the top metal of the Si-device to a lead frame or other external metal terminals.
Newer packaging technologies attempt to minimize inductance and provide improved thermal connectivity to a heatsink by bond wireless connection techniques. One example of such packaging is provided in assignee International Rectifier Corporation's Direct DirectFET® line of products which are further described in U.S. Pat. No. 6,624,522, the entire contents of which are hereby incorporated by reference herein. Another example of such alternative packaging technology utilizing a horseshoe-shaped direct bonded copper substrate (DBC) can is provided in assignee's Provisional Patent Application Ser. No. 60/761,722, filed Jan. 24, 2006, entitled STRESS-REDUCED BOND-WIRELESS PACKAGE FOR HIGH POWER DENSITY DEVICES (IR-3177 Prov) from which Assignee's presently co-pending application Ser. No. 11,641,270 entitled PACKAGE FOR HIGH POWER DENSITY DEVICES filed Dec. 18, 2006 claims priority. The entire contents of each of these applications is hereby incorporated herein by reference. In these references, a Si-device, or die, is mounted in a can-shaped housing and the top side of the power device (source/emitter and gate contact) is soldered to a metal pad in order to gain higher current carrying ability, reduced inductance and better thermal performance. In particular, for power switches, providing a large metal contact on both sides of the Si-die is beneficial to optimize electric and thermal performance.
The introduction of such bond wireless die attachment designs, however, makes the solder joint more important. In particular, the solder joint and the potential failure mechanism of this contact layer has a major influence on the quality and reliability of products in which it is used. The solder joint becomes particularly important when the solder joint forms both the electrical and mechanical contact layer on the top and bottom of the Si-device.
Typically, the top side of the die is contacted by wire bonds to a substrate or leadframe. In the case of bond wireless technology, solder bumps are provided on the die on a wafer level. The bumps are relatively small for the gate pad of a power switch or for IC contact pads (e.g. ball grid arrays) and are relatively large when used to establish high current connections for source pads of MOSFETS or IGBTs, for example.
Further, generally, the back side of the Si-device is usually soldered to a substrate such as a metal leadframe, DBC, printed circuit board (PCB) etc. This solder area is relatively large and typically corresponds to die size. For this back side attachment, it is common to use a solder paste which is a mixture of a solder alloy (such as PbSn or lead free SnAgCu) and a flux. The flux is used to clean the contact surfaces and optimize the wetting of the solder, especially on oxidized surfaces such as copper. Typically, the solder paste is dispensed or stencil printed on the substrate (leadframe, DBC, PCB, etc) and then the die is placed in the solder paste nest. The solder paste is then melted in a solder oven (or reflow oven) to form the intermetallic contact between the Si-metallization and the substrate metal.
Using this technology, it is common to adjust the solder thickness oven profile (temperature and time). However, this approach does not provide for very close control of solder thickness. For example, die movement during the liquid phase of the solder paste often results due to creeping or flow of the liquid solder. Such creep and/or flow cannot be well predicted. Further, different wetting of the solder paste to the substrate or leadframe may result in a thinner or thicker distribution of solder, and thus, variations in the thickness of the final solder layer.
One means for addressing these problems is the use of a pattern of solder-stop lacquer on the substrate or leadframe to prevent the solder from spreading too far or by otherwise limiting the metal pad area. However, such techniques are generally expensive and don't completely prevent die movement. For example, such techniques do not address problems that can arise when the die is tilted. Further, when such techniques are used, it is difficult to change the die, solder pattern or solder thickness without changing the tooling and other equipment used, which can be expensive and time consuming.
Shifts in the position of the die result in the die not being properly postioned relative to the circuit pattern and/or may result in the die being tilted in one direction or the other. Further, chemical reactions between the flux and the contact surfaces can result in bubbling of the solder when in the liquid phase. This is another source of unwanted movement of the die.
These problems may not reduce yield in certain applications. That is, the movement of the die may not be a problem in certain applications, however, precise positioning of the die may be critical in other applications. Even small movements of the die can be a problem for wire bond processes to fine-structure pads or when the Si-device is to be flip-chip soldered with narrow tolerances in bump position (height and location). It is particularly important that the die be level and well positioned after mounting in the metallic can used in the DirectFET® line of products.
One other problem with present solder paste technology is the residue of the flux that is typically stuck to the die or substrate after the solder process. This residue may be hard to remove, and if not removed, may cause problems with wire bonding or other electrical contact techniques. Also, any subsequent mold processing would require that the flux be removed. Thus, the removal of the flux is often necessary, and thus represents additional expense.
An alternative technique is the use of so-called solder pre-form in place of the solder paste. The solder pre-forms are typically pre-formed sections of solder foil with a defined thickness (typically 10 μm to over 100 μm) and dimensions that roughly correspond to the desired solder pad size. These pre-forms are typically used without flux. They are typically soldered via a formic gas vacuum soldering process in which formic gas (e.g. formic acid in gas phase) performs the role of the flux to clean the surfaces without leaving a residue. However, this technique still makes it difficult to control the thickness of the solder layer. While the thickness of the solder layer is set by the thickness of the solder pre-form, when the solder melts, this thickness changes. Further, the die also moves when the solder melts, which also results in variation of the solder thickness as noted above.
FIG. 1 is an illustration of an Si-device, of die, 100 that is mounted on a substrate, or leadframe, 102 via a solder layer 104 with varying thickness 104a, 104b. As illustrated, the conventional techniques result in variations in the position of the die 100 on the substrate 102 and the additional problems of the flux residue 106 noted above. For example, in FIG. 1, better wetting of the substrate 102 on one side of the die 100 has resulted in the solder spreading further in that direction. Thus, the thickness of the solder layer 104 on that side is smaller than that on the other side and the die 100 is tilted.
The problems described above and illustrated in FIG. 1 are common in all conventional Si-die attachment techniques. In some applications, these variations are not a particular problem. However, in applications where a single device needs to be soldered precisely in a metal housing, like a MOSFET in the DirectFET® line of products noted above or in the horseshoe-shaped can mentioned in the co-pending application entitled PACKAGE FOR HIGH POWER DENSITY DEVICES mentioned above, these variations are unacceptable.
In order to avoid some of these problems, an adhesive may be used to attach the Si-die, or device, to the metallic can. For example, adhesives may be used to attach the Si-device in the DirectFET® line of products since the adhesive glue can be better controlled. However, a solder connection would provide superior electrical and thermal characteristics and would provide for an increase in the current carrying ability. However, as described above, conventional solder bonding does not provide for precise enough control to allow for its use in the DirectFET® line of products. In particular, the DirectFET® line of products require that the gate bumps and source bumps be in a precise position and perfectly level with respect to the metallic can, which are problems with the soldering techniques described above.
One alternative means for mounting one device on another is proposed in U.S. Pat. No. 4,934,679 to Kaiser. In Kaiser, a positional fixation element, or elements, are provided on a first structural component to fix the position of a second structural component that is mounted on the first structural component. A mandrel-like tool is used to form the positional fixation elements(s). Specifically, the tool is pressed into the first component on an incline relative to a reference plane of the first element. In the process, material is displaced to form a groove and an accumulation of material with a shape corresponding to that of the position fixation element. The position fixation element(s) are suitable for positioning electrical circuits, for example, when glued or soldered onto a first component. While the positional fixation elements of Kaiser may be useful to position the second component, the mandrel tool used to make them may not always provide an equal accumulation of material, and thus, the positional fixation elements may not provide a stable support for the second component.
Thus, it would be beneficial to provide a substrate and method that allows for mounting a Si-device thereon using solder that avoids the problems described above.